Средства разработки интегральных схем (ИС) управления питанием TPS53317EVM-750

Оценочная плата для синхронного понижающего стабилизатора , с технологией D-CAP+™

The TPS53317EVM-750 is an evaluation module for TPS53317 synchronous buck regulator. The TPS53317 is a FET integrated tracking synchronous buck regulator designed mainly for DDR termination. The TPS53317 employs D CAP+ mode operation that provides ease of use, low external component count and fast transient response. It can also be used for other POL regulation applications requiring up to 6A. In addition, the TPS53317 still utilises pulse width modulation (PWM) for output voltage regulation when sinking current. The switchers are turned on in pulses to sink the negative inductor current to the input side. The evaluation module is designed to use a 1.5V voltage rail to produce a regulated 0.75V or use a 1.35V voltage rail to produce a regulated 0.675V output at up to 6A load current. The evaluation module is designed to demonstrate the TPS53317 in a typical low voltage application while providing a number of test points to evaluate the performance of the TPS53317.

• Integrated droop support
• External tracking support
• Selectable switching frequency settings (600KHz and 1MHz)
• Selectable light load operation modes (auto skip and forced CCM)
• Selectable valley over current limit
• Featured with PGOOD function
• Convenient test points for probing critical waveforms

Области применения

Управление Питанием, Встроенные Конструкции и Разработка This EVM should be operated within the input voltage range of 1.4V to 1.6V and the output voltage range of 0.735V to 0.765V. Exceeding the specified input voltage range may cause damage to the EVM.