Микропроцессоры AT91SAM9X35-CU

Микроконтроллер ARM , SAM9 Family AT91SAM9X Series Microcontrollers, ARM9, 32бита, 400 МГц, 32 КБ

The AT91SAM9X35-CU is a SMART 400MHz 32-bit Embedded Microprocessor Unit based on ARM926EJ-S processor. This MPU features an extensive peripheral set and high bandwidth architecture for industrial applications that require refined user interfaces and high-speed communication. The SAM9X35 features a graphics LCD controller with 4-layer overlay and 2D acceleration and a 10-bit ADC that supports 4-wire or 5-wire resistive touchscreen panels. Networking/connectivity peripherals include two 2.0A/B compatible controller area network (CAN) interfaces and an IEEE Std 802.3-compatible 10/100 Mbps Ethernet MAC. Multiple communication interfaces include a soft modem supporting exclusively the conexant SmartDAA line driver, HS USB Device and Host, FS USB Host, two HS SDCard/SDIO/MMC interfaces, USARTs, SPIs, I²S, TWIs and 10-bit ADC.

• ARM926EJ-S ARM Thumb processor running at up to 400MHz at 1.0V ±10%
• 16kB Data cache, 16kB Instruction cache, memory management unit
• Power-on reset cells, reset controller, shutdown controller, periodic interval timer, WDT and RTC
• Boot mode select option, remap command
• Internal low power 32kHz RC and fast 12MHz RC oscillators
• Selectable 32768Hz low-power oscillator and 12MHz oscillator
• One PLL for the system and one PLL at 480MHz optimized for USB high speed
• Twelve 32-bit-layer AHB bus matrix for large bandwidth transfers
• Dual peripheral bridge with dedicated programmable clock for best performances
• Two dual port 8-channel DMA controllers (DMAC)

• Advanced interrupt controller (AIC) and debug unit (DBGU)
• Two programmable external clock signals
• Shutdown controller with four 32-bit battery backup registers
• Clock generator and power management controller
• Very slow clock operating mode, software programmable power optimization capabilities
• Four 32-bit parallel I
• O controllers
• 105 Programmable I
• O lines multiplexed with up to three peripheral I
• Os
• Input change interrupt capability on each I
• O line, optional Schmitt trigger input
• Individually programmable open-drain, pull-up and pull-down resistor, synchronous output
• LCD controller (LCDC) with overlay, alpha-blending, rotation, scaling and colour conversion

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