Логическая ИС SN74LVC2G79DCUR

Триггер , 74LVC79, D, 3.7 нс, 160 МГц, 32 мА, VSSOP

The SN74LVC2G79DCUR is a dual positive-edge-triggered D-type Flip-flop is designed for 1.65 to 5.5V VCC operation. When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. It is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

• 4.2ns at 3.3V Maximum tpd
• Ioff Supports live insertion, partial-power-down mode operation and back drive protection
• Latch-up performance exceeds 100mA per JESD 78, class II
• 10µA Maximum low power consumption
• ±24mA Output drive at 3.3V
• Green product and no Sb/Br

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