Логическая ИС SN74LS90D

Декадный счетчик , семейство LS, 42МГц, 4.75В - 5.25В, SOIC-14

The SN74LS90D is a decade counter contains four flip-flops and additional gating to provide a divide-by-two counter and a three-stage binary counter for which the count cycle length is divide-by-five. It has gated set-to-nine inputs for use in BCD nine's complement applications. To use their maximum count length of this counter, the CKB input is connected to the QA output. The input count pulses are applied to CKA input and the outputs are as described in the appropriate function table. A symmetrical divide-by-ten count can be obtained from the LS90 series counter by connecting the QD output to the CKA input and applying the input count to the CKB input which gives a divide-by-ten square wave at output QA.

• TTL input compatible
• CMOS Output
• Green product and no Sb/Br

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