Логическая ИС SN74LS670N

Защелка , 74LS670, TTL, DIP

The SN74LS670N is a 4-by-4 Register File with 3-state outputs. It incorporated the equivalent of 98 gates. The register file is organized as 4 words of 4-bit each and separate on-chip decoding is provided for addressing the four word locations to either write-in or retrieve data. This permits simultaneous writing into one location and reading from another word location. Four data inputs are available which are used to supply the 4-bit word to be stored. Location of the word is determined by the write-address inputs A and B in conjunction with a write-enable signal. Data applied at the inputs should be in its true form. That is, if a high-level signal is desired from the output, a high-level is applied at the data input for that particular bit location. The latch inputs are arranged so that new data will be accepted only if both internal address gate inputs are high. When this condition exists, data at the D input is transferred to the latch output.

• Separate read/write addressing permits simultaneous reading and writing
• Typically 20ns fast access time
• Organized as 4 words of 4 bits
• Expandable to 512 words of n-bits

Области применения

Промышленное