Логическая ИС SN74LS393D

Декадный/ двоичный счетчик , семейство LS, 35МГц, 4.75В - 5.25В, SOIC-14

The SN74LS393D is a 4bit dual binary counter contains eight flip-flops and additional gating to implement two individual four-bit counters. It incorporates dual divide-by-two and divide-by-five counter, which can be used to implement cycle lengths equal to any whole and/or cumulative multiples of 2 and/or 5 up to divide-by-100. When connected as a bi-quinary counter, the separate divide-by-two circuit can be used to provide symmetry (a square wave) at the final output stage. It comprises two independent four-bit binary counters each having a clear and a clock input. It has parallel outputs from each counter stage so that any submultiple of the input count frequency is available for system-timing signals.

• Direct clear for each 4bit counter
• Buffered outputs reduce possibility of collector commutation
• Green product and no Sb/Br

Области применения

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