Логическая ИС SN74AHCT595D .

Регистр сдвига , семейство AHCT, 74AHCT595, Последовательный в Параллельный, 1 Элемент, 8 бит, SOIC

The SN74AHCT595D is a 8-bit Shift Register with 3-state output registers. It contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for the shift and storage registers. The shift register has a direct overriding clear (SRCLR\) input, serial (SER) input and serial outputs for cascading. When the OE\ input is high, the outputs are in the high-impedance state. Both the shift register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered. If both clocks are connected together, the shift register always is one clock pulse ahead of the storage register.

• Inputs are TTL-voltage compatible
• Shift register has direct clear
• Latch-up performance exceeds 100mA per JESD 78, class II
• Green product and no Sb/Br

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