Логическая ИС CD74HCT259M

Защелка , 74HCT259, Адресуемая, Стандартный, 16 нс, 4 мА, SOIC

The CD74HCT259M is a 8-bit CMOS Addressable Latch features the low-power consumption associated with CMOS circuitry and has speeds comparable to low-power Schottky. It latches three active modes and one RESET mode. When both the LE\ and master RESET (MR\) inputs are low (8-line demultiplexer mode) the output of the addressed latch follows the data input and all other outputs are forced low. When both MR\ and LE\ are high (memory mode), all outputs are isolated from the data input, i.e., all latches hold the last data presented before the LE\ transition from low to high. A condition of LE\ low and MR\ high (addressable latch mode) allows the addressed latch's output to follow the data input, all other latches are unaffected. The RESET mode (all outputs low) results when LE\ is high and MR\ is low.

• Buffered inputs and outputs
• Four operating modes
• Balanced propagation delay and transition times
• Significant power reduction compared to LSTTL logic ICs
• High noise immunity
• Direct LSTTL input logic compatibility
• CMOS Input compatibility
• Green product and no Sb/Br

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