Логическая ИС CD74HC166M

Регистр сдвига , 74HC166, Параллельный в Последовательный, 1 Элемент, 8 бит, SOIC, 16 вывод(-ов)

The CD74HC166M is a 8-bit high speed CMOS parallel-in/serial-out Shift Register fabricated with silicon gate CMOS technology. It possesses the low power consumption of standard CMOS integrated circuits and can operate at speeds comparable to the equivalent low power Schottky device. It has fully synchronous serial or parallel data entry selected by an active low parallel Enable (PE\) input. When the PE\ is low one setup time before the low-to-high clock transition, parallel data is entered into the register. When PE\ is high, data is entered into the internal bit position Q0 from serial Data Input (DS) and the remaining bits are shifted one place to the right (Q0 → Q1 → Q2, etc.) with each positive-going clock transition. For expansion of the register in parallel to serial converters, the Q7 output is connected to the DS input of the succeeding stage. The clock input is a gated OR structure which allows one input to be used as an active low clock Enable (CE\) input.

• Buffered inputs
• Balanced propagation delay and transition times
• Significant power reduction compared to LSTTL logic ICs
• High noise immunity
• Direct LSTTL input logic compatibility
• 10 LSTTL Loads standard outputs
• 15 LSTTL Loads bus driver outputs
• Green product and no Sb/Br

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