Логическая ИС CD4017BM96 .

Счетчик , декадный/делитель, CD4017B, 11МГц, отсчет до 10, 3В до 18В питание, SOIC-16

The CD4017BM96 is a CMOS Decade Counter with 10 decoded outputs. Inputs include a clock, reset and clock inhibit signal. Schmitt trigger action in the clock input circuit provides pulse shaping that allows unlimited clock input pulse rise and fall times. It is advanced one count at the positive clock signal transition if the clock inhibit signal is low. Counter advancement via the clock line is inhibited when the clock inhibit signal is high. A high reset signal clears the counter to its zero count. Use of the Johnson counter configuration permits high-speed operation, 2-input decode-gating and spike-free decoded outputs. Anti-lock gating is provided, thus assuring proper counting sequence. The decoded output is normally low and go high only at their respective decoded time slot. Each decoded output remains high for one full clock cycle. A carry-out signal completes on cycle every 10 clock input cycles and is used to ripple-clock the succeeding device in a multi-device counting chain.

• Fully static operation
• Standardized, symmetrical output characteristics
• 100% Tested for quiescent current at 20V
• Green product and no Sb/Br

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